Serenity's Bottleneck Investing Method
A retail "optical-comms bottleneck hunter" abroad and her five-factor framework, plus the chokepoint names she has called out publicly across industries
Serenity (X handle @aleabitoreddit) is a U.S.-equities retail investor who moved from Reddit's WallStreetBets to X and built a following on Xueqiu, positioning herself as an AI and semiconductor supply-chain analyst. Her approach is bottleneck investing: rather than chase the obvious leaders like Nvidia or Meta, she reverse-engineers their supply chains to find upstream chokepoints that only one or two suppliers worldwide can serve, where the West lacks an alternative and switching costs run extreme, and she gets in before institutional money rotates and the market prices it fully. The test is five factors holding at once: confirmed demand, constrained supply, low attention, value capture, and a catalyst. The process runs six steps: find the big trend, map the supply chain, locate the bottleneck, grade the evidence, run an inverse checklist for risk control, then size the position to match the depth of research. Her signature "geographic bottleneck map" breaks AI optical interconnect into: U.S. InP substrates, Swedish CPO lasers, Taiwanese foundry/substrate/OSAT, Japanese high-end glass fiber, and Korean HBM. This topic is layered along her bottleneck chain and collects the names she has called out or discussed publicly as case studies for the methodology, walking through each one's chokepoint position and value capture qualitatively. It does not restate her return figures, and it is not a disclosure of holdings or a recommendation to buy.
Compound-semiconductor substrates and epitaxial materials (the foundation of the photonic chip)
The pressure point of Serenity's methodology: optical-comms lasers (EML/DFB/CW) and silicon-photonics devices are all grown on InP (indium phosphide), GaAs, and SOI compound or engineered substrates, where Western scale capacity is highly concentrated, certification runs in years, and capacity expands slowly. This is the bottleneck within the bottleneck she returns to again and again. She likens InP substrates to the Strait of Hormuz of the supply chain: small in volume, but cut it off and everything stops.
InP/GaAs single-crystal substrates, with its own upstream gallium, indium and arsenic feedstock plus pBN crucibles: the very top of the photonic-chip substrate chain.
Global leader in SOI (silicon-on-insulator) and engineered substrates, the source of the specialty substrates that silicon photonics and CPO architectures require.
Foundry for compound-semiconductor epiwafers, including InP epitaxy, a 6-inch InP platform and VCSEL epitaxy, sitting between substrate and device.
The other InP-substrate heavyweight, forming the InP-supply duopoly alongside AXT.
One of the few Western gallium/germanium/indium (plus bismuth/selenium/tellurium) refiners with a compound-semiconductor wafer fab, the West's partial substitute for the key metals upstream of InP and GaAs.
CPO laser sources and EML devices (generating the light)
Once data centers shift from copper to optics (CPO/optical I/O), the light source that "lights the lamp" becomes the new chokepoint: CPO needs external continuous-wave (CW/DFB) laser arrays, and high-speed optical modules need EMLs (electro-absorption modulated lasers). A handful of players hold this layer's supply. It is the core bottleneck she derives from the copper-to-optics trend.
External light-source (ELS) arrays of InP CW/DFB lasers for CPO: the upstream chokepoint of light generation, supplying the "lamp" to GPU and CPO optical engines.
EML/CW lasers and optical transceiver devices, forming the EML-upstream duopoly with Coherent, supplying the light source for 800G/1.6T modules.
EML/CW lasers and optical transceiver devices, the other pole of the EML-upstream duopoly, integrating vertically up into modules.
Silicon-photonics foundry, compound foundry, optical DSP (integrating the light)
Integrating lasers, modulators and waveguides onto a chip takes silicon-photonics (SiPh) and compound-semiconductor foundry capacity; the electrical "brain" for the optical signal falls to optical DSP/PAM4 and custom ASICs. In this layer she looks for foundry and DSP chokepoints where capacity is booked ahead and switching costs are high.
Dedicated silicon-photonics (SiPh) foundry, handling the SiPh wafer fabrication for CPO and optical engines.
Specialty-process foundry with a silicon-photonics platform; the foundry anchor of the Sivers-GF "SCALE" silicon-photonics partnership.
Optical-interconnect DSP/PAM4 and custom ASICs, the core supply of the optical module's electrical brain.
One of the GaAs/InP compound-semiconductor wafer-foundry duopoly: the foundry upstream of lasers and RF devices ("Win will win").
Anchor supplier of optical DSP/PAM4 and hyperscaler in-house ASICs, and one of the drivers of CPO switching.
Specialty-process foundry, one of the lead foundries in the EU silicon-photonics alliance.
Optical modules, optical devices, OSAT and test (the finished light: built, connected, verified)
Packaging lasers, chips and fiber into usable optical modules, aligning and coupling fiber precisely into the silicon-photonics chip (FAU), then verifying reliability through wafer-level burn-in and test. This is the visible tail of the optical chain, and it hides high-precision chokepoints in FAU alignment, CPO packaging and test, and burn-in equipment.
Optical transceiver maker, vertically integrated from laser to module, riding the CPO/ELS ramp.
Fiber array units (FAU): the connector chokepoint that aligns and couples fiber precisely into silicon-photonics/CPO chips, a key bottleneck node in TSMC's COUPE silicon-photonics packaging architecture.
CPO/1.6T optical-device packaging and test (OSAT), especially the harder FAU optical alignment, the optical-packaging arm of the Hon Hai system.
Wafer-level burn-in and test equipment, covering photonics/CPO, HBM memory, and SiC/GaN.
Leader in precision assembly (EMS) of optical devices and modules, taking outsourced manufacturing from top optical-comms makers.
Advanced packaging, substrates, glass materials
High-compute chips ride on ABF substrates and lean on advanced packaging to integrate multiple dies, while CPO and high-speed interconnect also call for specialty glass/glass substrates and low-loss fiber. The chokepoints in this layer sit in high-grade substrate yield, the equipment for via formation in glass substrates, and the scale barrier in fiber glass.
One of the world's largest ABF substrate (FC-BGA) makers, a key substrate-supply node for packaging AI/HPC high-compute chips.
Leader in fiber, hollow-core fiber and glass materials, the supplier of the low-latency interconnect fiber used between AI clusters.
Near-sole supplier of LIDE laser-induced deep-etch equipment for glass substrates (glass-core packaging/glass for CPO): the equipment chokepoint in via formation for advanced-packaging glass.
Memory and HBM (the memory wall)
The other physical constraint on AI compute is the memory wall: as HBM (high-bandwidth memory) stack heights and die sizes rise, it re-rates cyclical memory into a high-margin technology product and tightens the whole chain of substrates, glass fiber, test and probe cards. She makes Korea the geographic center of this layer's bottleneck.
The No. 1 HBM supplier, tied most deeply to the NVIDIA platform, the core chokepoint in the AI-compute chain's HBM bottleneck.
Full-stack DRAM/NAND/HBM IDM, the No. 2 HBM supplier and the largest memory-die capacity, the volume chokepoint of AI memory supply.
One of the world's three largest DRAM/HBM makers (No. 3 HBM supplier), a high-grade DRAM-supply node that benefits directly from the AI memory wall.
Pure-play NAND flash/enterprise SSD vendor (spun out of Western Digital), a NAND-supply node for AI data-center storage expansion.
Leader in NAND flash controllers (SSD/eMMC/UFS controllers), the controller chokepoint of storage modules.
A tradable vehicle she uses to package Samsung plus SK Hynix HBM exposure (the index is weighted mostly toward the two memory giants), sidestepping the hurdle of buying Korean shares directly.
NOR/NAND/ROM flash maker, one link in memory-die supply.
Taiwanese standard/niche DRAM maker, a Taiwan-listed play on the memory-cycle reversal.
AI compute, cloud, connectivity (the demand side and compute delivery)
The confirmed demand behind the bottleneck comes from AI compute expansion itself. This layer holds the compute-delivery and connectivity chokepoints she has named or favored: dedicated AI cloud (neocloud), PCIe/CXL connectivity, CPU architecture and edge compute. It also includes the counter-examples she has explicitly turned cautious or bearish on, shown here as they are.
Vertically integrated AI/HPC dedicated cloud (neocloud), capturing the GPU-rental demand spilling out of hyperscaler AI capex.
PCIe/CXL retimer and connectivity chips, the chokepoint for compute interconnect inside AI servers.
CPU instruction-set/IP licensor, valued for the lift its AI CPU brings to licensing and royalty growth.
Low-cost edge-computing/embedded platform; she named it early and favors the edge-compute and hardware demand AI drives.
A U.S. domestic neocloud tied deeply to Nvidia, larger in revenue but more heavily levered.
A Bitcoin miner pivoting to AI compute, a neocloud edge player.
Energy and power (AI's physical constraint)
She folds "the end of AI compute is power and energy" into the bottleneck view, but the names cluster in upstream fuel supply (LNG exports, oil and gas) rather than power equipment, taking the scale and long-term-contract structure of U.S. LNG export capacity, plus a geopolitical-disruption premium, as the cues.
The largest U.S. LNG exporter and the world's second-largest LNG operator, integrated across liquefaction, processing and export.
A large LNG exporter under construction and in planning (Rio Grande LNG, Texas), a multi-year play on LNG capacity.
Integrated oil-and-gas supermajor, a steady geopolitical hedge for the energy sleeve.
Crypto, digital assets and other thematic chokepoints
She extends the same "confirmed demand, constrained supply, value capture, catalyst" framework beyond the optical-comms backbone to other themes: compliant crypto trading and stablecoin equity (equities only, no token positions), and strategic national-security chokepoints like rare earths. This layer shows the breadth of her methodology; certainty and chokepoint strength run weaker than the core bottleneck chain.
The largest compliant U.S. crypto exchange, with diversified revenue from trading, custody, staking and a USDC share.
Issuer of USDC (the second-largest stablecoin), with revenue mainly from interest on USDC reserves.
Zero-commission trading platform; crypto trading contributes meaningful revenue, rising and falling with the digital-asset cycle.
The largest integrated U.S. rare-earth mining and magnet-materials player, the national-security-grade strategic chokepoint of rare-earth processing.